The present invention relates generally to photodetectors, and more particularly to a PIN photodetector with reduced capacitance and increased bandwidth.
PIN photodetectors are used in a wide variety of applications in today""s optoelectronics industry. For example, PIN photodetectors are commonly used as optical monitors and optical receivers.
P-i-N (PIN) photodetectors consist of an intrinsic layer formed between a P-type layer and an N-type layer. When an electric field is applied across the device, the intrinsic layer is depleted of free carriers and the majority of the electric field forms across this region effectively creating a parallel plate capacitor. Light directed towards the device is absorbed in the intrinsic region, creating electron-hole pairs. A current proportional to the light absorbed in the intrinsic region (xe2x80x9cphotocurrentxe2x80x9d) is generated when the electrons and holes are accelerated to the N-type and P-type regions respectively, by the electric field.
A typical application for such a device is the detection of an amplitude modulated optical signal. In such an application, the maximum modulation frequency is determined by the overall bandwidth of the device and the minimum modulation detectable is determined by the optical sensitivity of the device. Therefore, two important issues associated with PIN photodetectors are the device capacitance, which is important in determining bandwidth, and responsivity which is important in determining overall sensitivity of the photoreceiver.
In order to maximize the amount of light coupled from a given optical source, it is desirable to maximize the light absorbing area of a photodetector. A larger detector area also increases the tolerance to poor or variable coupling to a given optical source. As the size of the PIN photodetector increases, however, the parasitic capacitance associated with the PIN photodetector also increases. When the capacitance associated with the photodetector is too high, the photodetector may not function in high-speed applications such as 2.5-40 Gbps (gigabit per second) optical receivers, for example. In order to optimize the performance of a PIN photodetector, it is therefore desirable to minimize the parasitic capacitance incurred due to other features in the detector.
A significant source of parasitic capacitance can exist between the interconnect metalization and/or bond pad, and subjacent regions such as contact layers or the underlying substrate. The interconnect metalization may provide electrical connection between each of the P-type electrode and N-type electrode, and the bond pads. The metal interconnect leads which form the bond pad and provide electrical contact between the PIN photodetector and the bond pad, are necessarily considerable in size due to wirebonding footprint requirements in standard industry practice. Underlying these interconnect leads may be other metal or semiconductor layers used to form connections, and the substrate upon which the photodetector is fabricated may be a conductor itself. As such, the parasitic capacitance arising between the substrate or other layers and the interconnect metal and bond pad, can represent a significant portion of overall parasitic capacitance.
Practical application of photodetectors also gives rise to signal-to-noise ratio considerations. The signal provided by a photodetector is the photocurrent previously discussed. However, all PIN photodetectors also generate noise current in the absence of light (termed dark current) due to diode leakage mechanisms such as minority carriers, thermally generated carrier pairs, and junction edges at semiconductor surfaces. Since the amplifying circuitry into which the output of a photodetector is typically sent, cannot distinguish photocurrent from dark current, minimizing dark current is important to preserving signal integrity in these systems.
According to one exemplary embodiment, the present invention provides a PIN photodetector formed of a stack of layers including a P-type layer, an intrinsic layer, and an N-type layer in an active area. A conductive interconnect lead couples the upper of the P-type layer or the N-type layer to a bond pad and is formed over an electrically insulating region formed in an inactive region. The electrically insulating region may reduce parasitic capacitance, as it essentially electrically insulates the conductive interconnect lead from the underlying N-type or P-type layer, and/or the substrate in the inactive area.
According to another exemplary embodiment, the present invention provides a PIN photodetector comprising a stack of layers including a P-type layer, an intrinsic layer and an N-type layer in an active area, at least portions of the stack extending out of the active area and into an inactive area. At least portions of the stack in the inactive area include a concentration of protons or other ionic impurities sufficient to render the portions of the stack electrically insulating. A metal interconnect lead electrically coupled to the stack within the active area, extends over the inactive area and is electrically insulated from the substrate by the impurity doped portions.
According to another exemplary embodiment, the present invention provides a PIN photodetector including a P-type electrode, an intrinsic layer and an N-type electrode in an active area. The PIN photodetector is formed of a stack of layers including an upper layer which is either the P-type or N-type electrode and an intermediate intrinsic layer formed over a conductive substrate which serves as the other of the P-type or N-type electrode in the active area. A conductive interconnect lead couples the upper electrode to a bond pad and is formed over an electrically insulating region formed in an inactive region. The electrically insulating region may reduce parasitic capacitance, as it essentially electrically insulates the conductive interconnect lead from the underlying conductive substrate in the inactive area.
According to another embodiment of the present invention, the PIN photodetector includes a mesa structure. The active area is formed in a mesa structure which includes the upper P or N-type layer and an intrinsic layer. The PIN photodetector comprises a stack of layers formed over a substrate in an active area, the stack including an N-type layer, an intrinsic layer and a P-type layer arranged to include an upper layer formed of one of the N-type layer and the P-type layer, an intermediate layer formed of the intrinsic layer and a lower layer formed of the other of the N-type layer and said P-type layer. The upper and intermediate layers essentially terminate at a sidewall of the mesa structure. The lower layer extends from the mesa in the inactive area, and each of the upper and lower layers are electrically coupled to separate metal interconnect leads. The upper layer includes an impurity species included in a peripheral portion to render the peripheral portion essentially electrically insulating.
According to another exemplary embodiment, the present invention provides an array of PIN photodetectors as described in one or more of the above embodiments, formed on a substrate.
According to yet another exemplary embodiment of the present invention, a method for producing a PIN photodetector is provided. The method includes forming a P-type layer, an intrinsic layer and a N-type layer over a substrate to form a film stack including an upper layer of one of the P-type layer and the N-type layer, an intermediate layer of the intrinsic layer and a lower layer of the other of the N-type layer and the P-type layer. In another exemplary embodiment, the method includes forming an upper layer as one of the N-type or P-type electrode, and an intermediate intrinsic layer over a conductive substrate functioning as the other of the N-type or P-type electrode in the active area. The method also provides for defining an active absorbing area and an inactive area, and converting at least portions of the inactive area to substantially electrically insulating portions. An interconnect metal lead is formed over the electrically insulating portions within the inactive area and is electrically coupled to the upper layer.